在我的makefile中,我有一个变量“NDK_PROJECT_PATH”,我的问题是我如何在编译时将它打印出来?

我读了使文件回显“$PATH”字符串,我尝试了:

@echo $(NDK_PROJECT_PATH)
@echo $(value NDK_PROJECT_PATH)

两者都给了我

"build-local.mk:102: *** missing separator.  Stop."

有人知道为什么对我没用吗?


当前回答

如果你不想修改Makefile本身,你可以使用——eval来添加一个新目标,然后执行这个新目标。

使- - - eval = ' print-tests: @echo TESTS $(TESTS) “print-tests

您可以使用CTRL-V, TAB在命令行中插入所需的制表符

上面的Makefile示例:

all: do-something

TESTS=
TESTS+='a'
TESTS+='b'
TESTS+='c'

do-something:
        @echo "doing something"
        @echo "running tests $(TESTS)"
        @exit 1

其他回答

@echo $(NDK_PROJECT_PATH)是一个很好的方法。 我不认为错误来自这里。 通常,当您键入错误的意图时,会出现此错误:我认为您在应该有制表符的地方有空格。

如果我想查看变量值,我通常会返回一个错误。(除非你想看看价值。它将停止执行。)

@echo $(NDK_PROJECT_PATH = $(NDK_PROJECT_PATH))

如果您只是想要一些输出,则需要单独使用$(info)。你可以在Makefile的任何地方这样做,它会显示这一行何时被求值:

$(info VAR="$(VAR)")

将输出VAR="<值的VAR>"每当make处理该行。这种行为非常依赖于位置,所以你必须确保$(info)展开发生在所有可以修改$(VAR)的事情已经发生之后!

一个更通用的选项是创建一个特殊的规则来打印变量的值。一般来说,规则是在变量赋值之后执行的,因此这将显示实际使用的值。(尽管规则可以改变变量。)良好的格式将有助于阐明变量的设置,而$(flavor)函数将告诉您某个变量的类型。所以在这个规则中:

print-% : ; $(info $* is a $(flavor $*) variable set to [$($*)]) @true

$* expands to the stem that the % pattern matched in the rule. $($*) expands to the value of the variable whose name is given by by $*. The [ and ] clearly delineate the variable expansion. You could also use " and " or similar. $(flavor $*) tells you what kind of variable it is. NOTE: $(flavor) takes a variable name, and not its expansion. So if you say make print-LDFLAGS, you get $(flavor LDFLAGS), which is what you want. $(info text) provides output. Make prints text on its stdout as a side-effect of the expansion. The expansion of $(info) though is empty. You can think of it like @echo, but importantly it doesn't use the shell, so you don't have to worry about shell quoting rules. @true is there just to provide a command for the rule. Without that, make will also output print-blah is up to date. I feel @true makes it more clear that it's meant to be a no-op.

运行它,你得到

$ make print-LDFLAGS
LDFLAGS is a recursive variable set to [-L/Users/...]

你可以在你的make文件中创建一个vars规则,像这样:

dispvar = echo $(1)=$($(1)) ; echo

.PHONY: vars
vars:
    @$(call dispvar,SOMEVAR1)
    @$(call dispvar,SOMEVAR2)

这里有一些更健壮的方法来转储所有变量:gnu make:列出特定运行中所有变量(或“宏”)的值。

make的所有版本都要求命令行缩进,第一个字符是制表符(而不是空格)。如果你向我们展示整个规则,而不是问题中的两行,我们可以给出更清晰的答案,但它应该是这样的:

myTarget: myDependencies
        @echo hi

其中第二行第一个字符必须是TAB。